The FELIN arithmetic coprocessor chip

Michel Cosnard (1) , A. Guyot (1) , B. Hochet (2) , Jean-Michel Muller (3) , H. Ouaouicha (4) , P. Paul (4) , E. Zysman (4)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
2 EINEV - EINEV - Ecole d'Ingénieurs de l'Etat de Vaud
3 LIP - Laboratoire de l'Informatique du Parallélisme
4 CAM - Center for Advanced Materials, Department of Chemical and Nuclear Engineering

A description is given of a general VLSI architecture for the computation of arithmetic expressions including floating-point transcendental functions. This architecture is divided in three parts: a communication machine, the control part of a computation machine, and the operative part of this computation machine. In order to compute the most usual transcendental functions, the authors introduce some general algorithms including, as a particular case, the CORDIC scheme. The major architecture goals were regularity, parameterization, and automatic design. The final chip is designed in a two-ALU CMOS technology, and its name is FELIN (fonctions elementaires integrees).

Mots clés: FELIN-arithmetic-coprocessor-chip; VLSI-architecture; floating-point-transcendental-functions; communication-machine; computation-machine; CORDIC-scheme; regularity-; parameterization-; automatic-design; two-ALU-CMOS-technology

Domaines: Micro et nanotechnologies/Microélectronique

Michel Cosnard, A. Guyot, B. Hochet, Jean-Michel Muller, H. Ouaouicha, et al.. The FELIN arithmetic coprocessor chip. Proceedings-of-the-8th-Symposium-on-Computer-Arithmetic-Cat.-No.87CH2419-0, 1987, Como, Italy. pp.107-12. ⟨hal-00014979⟩