A semiempirical model for wakeup time estimation in power-gated logic clusters

Vivek Tovinakere Dwarakanath (1) , Olivier Sentieys (1) , Steven Derrien (1)

1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources

Domaines: Architectures Matérielles [cs.AR]

Vivek Tovinakere Dwarakanath, Olivier Sentieys, Steven Derrien. A semiempirical model for wakeup time estimation in power-gated logic clusters. The 49th Annual Design Automation Conference 2012, DAC '12, San Francisco, CA, USA, June 3-7, 2012, Jun 2012, San Fransisco, United States. pp.48-55. ⟨hal-00752606⟩