Exploiting Parallelism in FPGAs for the Real-Time Interpretation of Interactive Multimedia Scores
Résumé
Real-time performance is essential for interactive multi- media applications. However, most of these applications are sequential or they are executed on architectures and operat- ing systems that do not provide a low-latency real-time per- formance. In this paper, we present a solution to this prob- lem, specifically in the interpretation of interactive multime- dia scores. For that, we present a novel parallel implementa- tion of interactive scores on a reconfigurable hardware. We take advantage of the parallelism and reliability provided by Field Programmable Gate Arrays (FPGAS) to perform in real-time the hardware representation of scores. The results of the simulations show that our approach allows the system to react instantaneously to user interactions. Moreover, the real-time constraints of the score are satisfied.
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