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Article Dans Une Revue Innovations in Systems and Software Engineering Année : 2018

TT-BIP: using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm

Résumé

In order to combine advantages of Real-Time Operating Systems (RTOS) implementing the Time-Triggered (TT) execution model and model-based design frameworks, we aim at proposing a correct-by-design methodology that derives correct TT implementations from high-level models. This methodology consists of two main steps; (1) transforming the high-level model into an intermediate model which respects the TT communication principles and where all communications between components are simple send/receive interactions, and (2) transforming the obtained intermediate model into the programming language of the target platform. In this paper, we focus on the presentation of the transformational methodology of the first step of this design flow. This methodology produces a correct-by-construction TT model by starting from a high-level model of the application software in Behaviour, Interaction , Priority (BIP). BIP is a component-based framework with formal semantics that rely on multi-party interactions for synchronizing components. Commonly in TT implementations, tasks interact with each other through a communication medium. Our methodology transforms, depending on a user-defined task mapping, high-level BIP models where communication between components is strongly synchronized, into TT model that integrates a communication medium. Thus, only inter-task communications and components participating in such interactions are concerned by the transformation process. We also provide correctness proofs of the transformation and apply it on an industrial case study.
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Dates et versions

hal-01823749 , version 1 (26-06-2018)

Identifiants

Citer

Hela Guesmi, Belgacem Ben Hedia, Simon Bliudze, Saddek Bensalem, Briag Lenabec. TT-BIP: using correct-by-design BIP approach for modelling real-time system with time-triggered paradigm. Innovations in Systems and Software Engineering, 2018, 14 (2), pp.117 - 142. ⟨10.1007/s11334-018-0312-y⟩. ⟨hal-01823749⟩
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