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Rapport Année : 1998

Circuit Generation for Verification of ESTEREL Programs

Alain Girault
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Gérard Berry
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Résumé

We propose in this paper a method that takes external Boolean variables into account for the verification of ESTEREL programs. The intermediate code that we use is a circuit that drives an action table. The circuit represents the control of the program, and the action table manipulates its external variables. The method transforms the actions into Boolean gates and registers acting on nets instead of variables. This involves encoding the input variables into the circuit and decoding output variables. This expansion method has been implemented within the \scdata\ processor and can be used in conjunction with the ESTEREL compiler.
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Dates et versions

inria-00073099 , version 1 (24-05-2006)

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  • HAL Id : inria-00073099 , version 1

Citer

Alain Girault, Gérard Berry. Circuit Generation for Verification of ESTEREL Programs. RR-3582, INRIA. 1998. ⟨inria-00073099⟩
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