Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures

Christophe Wolinski (1) , Krzysztof Kuchcinski (2) , Jürgen Teich (3) , Frank Hannig (3)

1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
2 Department of Computer Science [Lund]
3 CS 12 - Department of Computer Science 12, Hardware-Software-Co-Design

In this paper, we present a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processor elements as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.

Mots clés: Reconfigurable processor arrays; Routing; Reconfiguration overhead minimization; Constraint programming

Domaines: Architectures Matérielles [cs.AR]

Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig. Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures. 16th International Symposium on Field-Programmable Custom Computing Machines (FCCM 2008), Apr 2008, Palo Alto, United States. pp.306-309, ⟨10.1109/FCCM.2008.16⟩. ⟨inria-00451676⟩