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inria-00071813v1
Reports
The SANDRA project: cooperative architecture/compiler technology for embedded real-time streaming applications [Research Report] RR-4773, INRIA. 2003 |
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inria-00072336v1
Reports
Variables d'induction généralisées pour l'analyse par instances de programmes récursifs [Rapport de recherche] RR-4252, INRIA. 2001 |
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inria-00072092v1
Reports
Multi-Periodic Process Networks: Technical Report [Research Report] RR-4496, INRIA. 2002 |
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inria-00071681v1
Reports
Putting Polyhedral Loop Transformations to Work [Research Report] RR-4902, INRIA. 2003 |
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hal-00992740v1
Conference papers
Elimination of memory-based dependences for loop-nest optimization and parallelization GROW 2011 : 3rd Workshop on GCC Research Opportunities, Jun 2011, Chamonix, France |
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inria-00551516v1
Conference papers
GRAPHITE Two Years After: First Lessons Learned From Real-World Polyhedral Compilation GCC Research Opportunities Workshop (GROW'10), Jan 2010, Pisa, Italy |
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inria-00551518v1
Conference papers
Preserving high-level semantics of parallel programming annotations through the compilation flow of optimizing compilers Proceedings of the 15th Workshop on Compilers for Parallel Computers (CPC'10), Jul 2010, Vienna, Austria |
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inria-00551512v1
Conference papers
Practical Aggregation of Semantical Program Properties for Machine Learning Based Optimization International Conference on Compilers Architectures and Synthesis for Embedded Systems (CASES'10), Oct 2010, Scottsdale, United States |
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inria-00551067v1
Conference papers
Combined Iterative and Model-driven Optimization in an Automatic Parallelization Framework Conference on Supercomputing (SC'10), Nov 2010, New Orleans, LA, United States |
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inria-00551515v1
Conference papers
Software Pipelining and Register Pressure in VLIW Architectures: Preconditionning Data Dependence Graphs is Experimentally Better Than Lifetime-Sensitive Scheduling 8th Workshop on Optimizations for DSP and Embedded Systems (ODES'10), Apr 2010, Toronto, Canada |
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inria-00070404v1
Reports
Synchronizing Periodic Clocks in Kahn Networks [Research Report] RR-5603, INRIA. 2005, pp.38 |
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inria-00551087v1
Conference papers
The Polyhedral Model Is More Widely Applicable Than You Think Proceedings of the International Conference on Compiler Construction (ETAPS CC'10), Mar 2010, Paphos, Cyprus. pp.283--303 |
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inria-00071468v1
Reports
Facilitating the Exploration of Compositions of Program Transformations [Research Report] RR-5114, INRIA. 2004 |
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inria-00551520v1
Conference papers
Erbium: A Deterministic, Concurrent Intermediate Representation for Portable and Scalable Performance ACM International Conference on Computing Frontiers (CF'10), May 2010, Bertinoro, Italy |
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inria-00128507v1
Conference papers
Building a Practical Iterative Interactive Compiler International Workshop on Statistical and Machine Learning Approaches Applied to Architectures and Compilation (SMART'07), Jan 2007, Ghent, Belgium |
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hal-00699588v1
Conference papers
Loop Unrolling Minimisation in the Presence of Multiple Register Types: a Viable Alternative to Modulo Variable Expansion HPCS 2011 - International Conference on High Performance Computing Simulation, Jul 2011, Istanbul, Turkey. ⟨10.1109/HPCSim.2011.5999826⟩ |
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inria-00551510v1
Conference papers
Erbium: A Deterministic, Concurrent Intermediate Representation to Map Data-Flow Tasks to Scalable, Persistent Streaming Processes International Conference on Compilers Architectures and Synthesis for Embedded Systems (CASES'10), Oct 2010, Scottsdale, United States. 11p |
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hal-00142347v1
Book sections
An adaptive particle -in-cell method using multi-resolution analysis. IRMA Lect. Math. Theor. Phys. Numerical methods for hyperbolic and kinetic problems, Eur. Math. Soc., pp.29, 2005 |
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hal-00911895v1
Conference papers
Two-layer Run-Time Power Management for embedded heterogeneous multi-core platforms DATE 13 - Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, Mar 2013, Grenoble, France |
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hal-00920903v1
Conference papers
The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices DSD, Sep 2013, Los Alamitos, United States. pp.272-279 |
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inria-00551078v1
Directions of work or proceedings
The HiPEAC Vision Marc Duranton. HiPEAC network of excellence, pp.60, 2010 |
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hal-00992721v1
Journal articles
TERAFLUX: Harnessing dataflow in next generation teradevices Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2014, 38 (8), pp. 976-990. ⟨10.1016/j.micpro.2014.04.001⟩ |
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hal-00872475v1
Directions of work or proceedings
Curves and Surfaces, 7th International Conference, Avignon, France, June 24-30, 2010 France. Springer, pp.748, 2012, 978-3642274121 |
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inria-00551513v1
Conference papers
Split Register Allocation: Linear Complexity Without the Performance Penalty International Conference on High Performance and Embedded Architectures and Compilers, Oct 2010, Pisa, Italy. 15 p |
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inria-00551083v1
Journal articles
ACOTES Project: Advanced Compiler Technologies for Embedded Streaming International Journal of Parallel Programming, Springer Verlag, 2011, 39 (3), pp.397-450. ⟨10.1007/s10766-010-0132-7⟩ |
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hal-00141067v1
Conference papers
A Language for the Compact Representation of Multiple Program Versions Oct 2005 |
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inria-00072298v1
Reports
Intraprocedural Pointer Analysis for Container-Centric Applications RR-4289, INRIA. 2001 |
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hal-00911893v1
Conference papers
Correct and Efficient Bounded FIFO Queues SBAC-PAD 2013 : International Symposium on Computer Architecture and High Performance Computing, Oct 2013, Porto de Galinhas, Brazil |
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hal-00911894v1
Conference papers
Schedule Trees IMPACT - 4th Workshop on Polyhedral Compilation Techniques, associated with HiPEAC, Jan 2014, Vienna, Austria |
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