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ensl-00356421v1  Conference papers
Florent de DinechinBogdan Pasca. Large multipliers with less DSP blocks
Field Programmable Logic and Applications, Aug 2009, Czech Republic
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tel-00301285v1  Theses
Romain Michard. Opérateurs arithmétiques matériels optimisés
Autre [cs.OH]. Ecole normale supérieure de lyon - ENS LYON, 2008. Français
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tel-00147426v1  Theses
Marc Daumas. Contributions à l'Arithmétique des Ordinateurs : Vers une Maîtrise de la Précision
Autre [cs.OH]. Ecole normale supérieure de lyon - ENS LYON, 1996. Français
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lirmm-00126262v1  Journal articles
Ryan GlabbLaurent ImbertGraham JullienArnaud TisserandNicolas Veyrat-Charvillon. Multi-Mode Operator for SHA-2 Hash Functions
Journal of Systems Architecture, Elsevier, 2007, Special Issue on Embedded Hardware for Cryptosystems, 52 (2-3), pp.127-138. ⟨10.1016/j.sysarc.2006.09.006⟩
lirmm-00125518v1  Conference papers
Romain MichardArnaud TisserandNicolas Veyrat-Charvillon. New Identities and Transformations for Hardware Power Operators
Advanced Signal Processing Algorithms, Architectures and Implementations XVI, Aug 2006, San Diego, California, U.S.A., pp.1-10 (631307), ⟨10.1117/12.676244⟩
inria-00000501v1  Book sections
Dominique LavenierMathieu Giraud. Bioinformatics Applications
Gokhale, Maya B., Graham, Paul S. Reconfigurable Computing. Accelerating Computation with Field-Programmable Gate Arrays, Springer, 2005, Foundation of computing, 0-387-26105-2
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inria-00524987v1  Conference papers
Mouna BakloutiPhilippe MarquetJean-Luc DekeyserMohamed Abid. Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip
6th International Symposium on Applied Reconfigurale Computing, ARC 2010, Mar 2010, Bangkok, Thailand. pp.110-121, ⟨10.1007/978-3-642-12133-3_12⟩
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lirmm-00733021v1  Poster communications
Guillaume CoppeyDavid AndreuDavid Guiraud. Distributed Measurement Unit for Closed-Loop Functional Electrical Stimulation: Prototype for Muscular Activity Detection
IFESS: International Functional Electrical Stimulation Society, Sep 2012, Banff, Canada. 17th International Conference of Functional Electrical Stimulation, pp.376-379, 2012
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ensl-00475780v2  Conference papers
Florent de DinechinHong Diep NguyenBogdan Pasca. Pipelined FPGA Adders
International Conference on Field Programmable Logic and Applications, Aug 2010, Milano, Italy. pp.422-427, ⟨10.1109/FPL.2010.87⟩
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ensl-00549682v1  Conference papers
Christophe AliasBogdan PascaAlexandru Plesco. Automatic Generation of FPGA-Specific Pipelined Accelerators
International Symposium on Applied Reconfigurable Computing (ARC'11), Mar 2011, Belfast, United Kingdom
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hal-02102042v1  Reports
Jean-Luc BeuchatNicolas BrisebarreJérémie DetreyEiji Okamoto. Arithmetic Operators for Pairing-Based Cryptography
[Research Report] LIP RR-2007-13, Laboratoire de l'informatique du parallélisme. 2007, 2+16p
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hal-02101996v1  Reports
Jérémie DetreyFlorent de Dinechin. Table-based polynomials for fast hardware function evaluation
[Research Report] LIP RR-2004-52, Laboratoire de l'informatique du parallélisme. 2004, 2+11p
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hal-02102238v1  Reports
Jérémie DetreyFlorent de Dinechin. Parameterized floating-point logarithm and exponential functions for FPGAs
[Research Report] LIP RR-2006-02, Laboratoire de l'informatique du parallélisme. 2006, 2+13p
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tel-00998248v1  Theses
Sana Cherif. Approche basée sur les modèles pour la conception des systèmes dynamiquement reconfigurables : de MARTE vers RecoMARTE
Modélisation et simulation. Université des Sciences et Technologie de Lille - Lille I, 2013. Français
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hal-01152144v1  Conference papers
Jean-Luc DekeyserAhmad Shadi Aljendi. Adopting New Learning Strategies for Computer Architecture in Higher Education Case Study: Building the S3 Microprocessor in 24 Hours
Workshop on Computer Architecture Education held in conjunction with the 42nd International Symposium on Computer Architeture, Jun 2015, Portland, United States
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hal-01248163v1  Reports
Julien ForgetFrédéric GuyomarchVlad Rusu. Programming with hardware/software functions
[Research Report] RR-8835, INRIA Lille Nord Europe. 2015, pp.18
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hal-01245800v2  Journal articles
Jean PerierWissem ChoucheneJean-Luc Dekeyser. Circuit Merging versus Dynamic Partial Reconfiguration -The HoMade Implementation
i-manager's Journal on Embedded Systems(JES), i-manager Publications, 2016
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tel-00527894v2  Theses
Mouna Baklouti. Méthode de conception rapide d'architecture massivement parallèle sur puce : de la modélisation à l'expérimentation sur FPGA
Informatique [cs]. Université Lille 1 Sciences et Technologies; École Nationale d'Ingénieurs de Sfax, 2010. Français
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hal-02301248v1  Conference papers
Sylvain Contassot-VivierJean-François CouchotMohammed BakiriPierre-Cyrille Heam. Fast and robust PRNGs based on jumps in N-cubes for simulation, but not exclusively for that.
The 2019 International Conference on High Performance Computing & Simulation, Jul 2019, Dublin, Ireland
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tel-00438603v1  Theses
Nicolas Veyrat-Charvillon. Opérateurs arithmétiques matériels pour des applications spécifiques
Autre [cs.OH]. Ecole normale supérieure de lyon - ENS LYON, 2007. Français
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tel-00852361v1  Theses
Chiraz Trabelsi. Contrôle matériel des systèmes partiellement reconfigurables sur FPGA : de la modélisation à l'implémentation
Systèmes embarqués. Université des Sciences et Technologie de Lille - Lille I, 2013. Français