Optimal and Robust Saturated Control for a Clock Generator
Résumé
Fine-grain Dynamic Voltage and Fre- quency Scaling (DVFS) is becoming a requirement for Globally-Asynchronous Locally-Synchronous (GALS) architectures. However, the area overhead of adding voltage and frequency control engines in each volt- age/frequency island must be taken into account to optimize the circuit. This paper focuses on the control for the frequency actuator. An optimal and robust saturated control law, with a minimum hardware implementation area is proposed for a Clock Gen- erator, taking into account the delay introduced by the sensor. This controller is designed with Lyapunov-Krasovskii theory that ensures asymptotic stability, disturbance rejection as well as system robustness with respect to delay presence and parameter uncertainties. The closed-loop system presents a regional stabilization due to the actuator saturation. An estimation of a maximum attraction domain is provided. The performance achieved with this controller are shown in simulation.
Domaines
Automatique
Origine : Fichiers produits par l'(les) auteur(s)
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