3-D Multilayer Copper Interconnects for High-Performance Monolithic Devices and Passives

Ayad Ghannam (1) , David Bourrier (2) , Lamine Ourak (3) , Christophe Viallon (3) , Thierry Parra (3)

1 LAAS - Laboratoire d'analyse et d'architecture des systèmes
2 LAAS-TEAM - Service Techniques et Équipements Appliqués à la Microélectronique
3 LAAS-MOST - Équipe Microondes et Opto-microondes pour Systèmes de Télécommunications

This paper presents a new and efficient low-cost multi-layer 3D copper interconnect process for monolithic devices and passives. It relies on the BPN and SU-8 photoresists, associated with an optimized electroplating process to form multi-level 3D interconnects in a single metallization step. The SU-8 is used as a permanent thick dielectric layer which is patterned underneath specific locations to create the desired 3D interconnect shape. A 3D seed layer is deposited above the SU-8 and the substrate to insure 3D electroplating current flow. The BPN is used as a thick mold for copper electroplating with an aspect ratio as high as 16:1. An optimized 3D copper electroplating process is later used to grow 3D interconnects, insuring transition between all metallic layers. Finally, high-Q (55 @ 5 GHz) power inductors have been designed and integrated above a 50 W RF power LDMOS device, using this process.

Mots clés: Above-IC; BPN; SU-8; copper; electroplating; high-Q; inductor; interconnect; monolithic microwave integrated circuit (MMIC); photoresist; process

Domaines: Electromagnétisme

Ayad Ghannam, David Bourrier, Lamine Ourak, Christophe Viallon, Thierry Parra. 3-D Multilayer Copper Interconnects for High-Performance Monolithic Devices and Passives. Components, Packaging and Manufacturing Technology, 2013, 3 (6), pp.935-942. ⟨10.1109/TCPMT.2013.2258073⟩. ⟨hal-00920609⟩