Effect of Electrical Stresses on Digital Integrated Circuits Power Integrity

Alexandre Boyer (1) , Sonia Ben Dhia (1)

1 LAAS-ESE - Équipe Énergie et Systèmes Embarqués

Recent studies have shown that integrated circuit aging modifies electromagnetic emission significantly. The proposed paper aims at evaluating the impact of aging on the power integrity of digital integrated circuits and clarifying its origin. On-chip measurements of power supply voltage bounces in a CMOS 90 nm technology test chip are combined with electric stress to characterize the influence of aging on power integrity. Simulation based on ICEM modeling modified by an empirical coefficient in order to take into account the circuit aging is proposed to model the evolution of the power integrity induced by device aging.

Domaines: Electronique

Alexandre Boyer, Sonia Ben Dhia. Effect of Electrical Stresses on Digital Integrated Circuits Power Integrity. 2013 17th IEEE Workshop on Signal and Power Integrity (SPI), May 2013, Paris, France. pp.1-4. ⟨hal-01006121⟩