Multi-core Code Generation from Polychronous Programs with Time-Predictable Properties

Abstract : Synchronous programming models capture concurrency in computation quite naturally, especially in its dataflow multi-clock (polychronous) flavor. With the rising importance of multi-core processors in safety-critical embedded systems or cyber-physical systems (CPS), there is a growing need for model-driven generation of multi-threaded code for multi-core systems. This paper proposes a build method of timepredictable system on multi-core, based on synchronous-model development. At the modeling level, the synchronous abstraction allows deterministic time semantics. Thus synchronous programming is a good choice for time-predictable system design. At the compiler level, the verified compiler from the synchronous language SIGNAL to our intermediate representation (S-CGA, a variant of guarded actions) and to multi-threaded code, preserves the time predictability. At the platform level, we propose a time-predictable multi-core architecture model in AADL (Architecture Analysis and Design Language), and then we map the multi-threaded code to this model. Therefore, our method integrates time predictability across several design layers.
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  • HAL Id : hal-01150341, version 1
  • OATAO : 13210

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Zhibin Yang, Jean-Paul Bodeveix, Mamoun Filali. Multi-core Code Generation from Polychronous Programs with Time-Predictable Properties. ACM/IEEE International Conference on Model Driven Engineering Languages and Systems: Workshop on Architecture Centric Virtual Integration - MODELS 2014, Sep 2014, Valencia, Spain. pp. 1-10. ⟨hal-01150341⟩

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