parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability

Theo Ungerer (1) , Christian Bradatsch (1) , Mike Gerdes (1) , Florian Kluge (1) , Ralf Jahr (1) , Jörg Mische (1) , Joao Fernandes (2) , Pavel G. Zaykov (2) , Zlatko Petrov (2) , Bert Böddeker (3) , Sebastian Kehr (3) , Hans Regler (4) , Andreas Hugl (4) , Christine Rochange (5) , Haluk Ozaktas (5) , Hugues Cassé (5, 6) , Armelle Bonenfant (5, 6) , Pascal Sainrat (5) , Ian Broster (7) , Nick Lay (7) , David George (7) , Eduardo Quinones (8) , Milos Panic (8, 9) , Jaume Abella (8) , Francisco Cazorla (8, 10) , Sascha Uhrig (11) , Mathias Rohde (11) , Arthur Pyka (11)

1 UNIA - University of Augsburg
2 Honeywell International S.r.o. [Prague]
3 DENSO (JAPAN)
4 Bauer Group (GERMANY)
5 IRIT-TRACES - Groupe de Recherche en Architecture et Compilation pour les systèmes embarqués
6 UT3 - Université Toulouse III - Paul Sabatier
7 Rapita Systems Ltd [York]
8 BSC-CNS - Barcelona Supercomputing Center - Centro Nacional de Supercomputacion
9 UPC - Universitat Politècnica de Catalunya = Université polytechnique de Catalogne [Barcelona]
10 CSIC - Consejo Superior de Investigaciones Cientificas [España] = Spanish National Research Council [Spain]
11 TU - Technische Universität Dortmund [Dortmund]

Engineers who design hard real-time embedded systems express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelizing hard real-time applications and running them on an embedded multi-core processor, which enables combining the requirements for high-performance with timing-predictable execution. parMERASA will provide a timing analyzable system of parallel hard real-time applications running on a scalable multicore processor. parMERASA goes one step beyond mixed criticality demands: It targets future complex control algorithms by parallelizing hard real-time programs to run on predictable multi-/many-core processors. We aim to achieve a breakthrough in techniques for parallelization of industrial hard real-time programs, provide hard real-time support in system software, WCET analysis and verification tools for multi-cores, and techniques for predictable multi-core designs with up to 64 cores.

Mots clés: Multiprocessing systems; Parallel programming; Embedded systems

Domaines: Réseaux et télécommunications [cs.NI]; Système d'exploitation [cs.OS]; Architectures Matérielles [cs.AR]; Systèmes embarqués

Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, et al.. parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. 16th Euromicro Conference on Digital System Design (DSD 2013), Sep 2013, Santander, Spain. pp. 363-370. ⟨hal-01231740⟩