A new methodology to extract the ICEM-CE internal activity block of a FPGA

Chaimae Ghfiri (1) , André Durier (1) , Alexandre Boyer (2) , Sonia Ben Dhia (2)

1 IRT Saint Exupéry - Institut de Recherche Technologique
2 LAAS-ESE - Équipe Énergie et Systèmes Embarqués

This paper describes a new methodology of construction of the internal activity block of an ICEM-CE model of an FPGA based on a predictive approach using the estimation tools of the dynamic power and the static timing proposed by the manufacturer of the integrated circuit.

Mots clés: Integrated circuits; Internal Activity; Conducted Emission; ICEM; FPGA; Dynamic power

Domaines: Réseaux et télécommunications [cs.NI]; Electronique

Chaimae Ghfiri, André Durier, Alexandre Boyer, Sonia Ben Dhia. A new methodology to extract the ICEM-CE internal activity block of a FPGA. EMC Europe, Sep 2017, Angers, France. pp. 1-6. ⟨hal-01661809⟩