Wet oxidation of nitride layer implanted with low-energy Si ions for improved oxide-nitride-oxide memory stacks

V. Ioannou-Sougleridis (1) , P. Dimitrakis (1) , V.Em. Vamvakas (1) , P. Normand (1) , Caroline Bonafos (2) , Sylvie Schamm-Chardon (2) , Nikolay Cherkashin (3) , Gérard Benassayag (2) , M. Perego (4) , M. Fanciulli (4)

1 NCSR - National Center for Scientific Research "Demokritos"
2 CEMES - Centre d'élaboration de matériaux et d'études structurales
3 CEMES-MEM - Matériaux et dispositifs pour l'Electronique et le Magnétisme
4 IMM - Istituto per la Microelettronica e Microsistemi [Catania]

An alternative method for the formation of the top oxide in oxide-nitride-oxide dielectric stacks is proposed. This method combines low-energy (1keV) silicon ion implantation into a thin nitride-oxide stack and subsequent low-temperature wet oxidation (850°C for 15min). Transmission electron microscopy shows that for an implanted dose of 1.5×10^16 Si cm^−2, an 8-nm-thick silicon oxide layer develops on the surface of the nitride-oxide stack. Time of flight secondary ion mass spectrometry reveals: (1) transformation of the implanted silicon nitride to an oxygen-rich-silicon nitride layer and (2) pilling up of nitrogen atoms at the bottom silicon/oxide-substrate interface. The resulting oxide-nitride-oxide stack exhibits strong charge storage effects and excellent charge retention properties leading to a 1.5V, 10yr extrapolated memory window at 125°C. These results suggest that the proposed fabrication route may lead to gate dielectric stacks of substantial potential impact for mainstream nitride-based memory devices.

Domaines: Science des matériaux [cond-mat.mtrl-sci]; Micro et nanotechnologies/Microélectronique

V. Ioannou-Sougleridis, P. Dimitrakis, V.Em. Vamvakas, P. Normand, Caroline Bonafos, et al.. Wet oxidation of nitride layer implanted with low-energy Si ions for improved oxide-nitride-oxide memory stacks. Applied Physics Letters, 2007, 90 (26), pp.263513. ⟨10.1063/1.2752769⟩. ⟨hal-01736066⟩