Solid phase epitaxy process integration on 50-nm PMOS devices: Effects of defects on chemical and electrical characteristics of ultra shallow junctions

R. El Farhane (1) , C. Laviron (2) , Fuccio Cristiano (3) , Nikolay Cherkashin (3) , P. Morin (1) , M. Juhel (1) , P. Stolk (1) , F. Arnaud (1) , A. Pouydebasque (1) , F. Wacquant (1) , D. Lenoble (1) , A. Halimaoui (1)

1 ST-CROLLES - STMicroelectronics [Crolles]
2 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
3 CEMES - Centre d'élaboration de matériaux et d'études structurales

We demonstrate in this paper the viability of an ultra-low thermal budget CMOS process enabling the formation of ultra shallow junctions with competitive transistor characteristics. In particular, we demonstrate in this work the influence of defects on chemical and electrical results. It is shown that the use of self-amorphizing implantation with BF2 for Source/Drain, reduces the junction leakage by two decades.

Domaines: Physique [physics]

R. El Farhane, C. Laviron, Fuccio Cristiano, Nikolay Cherkashin, P. Morin, et al.. Solid phase epitaxy process integration on 50-nm PMOS devices: Effects of defects on chemical and electrical characteristics of ultra shallow junctions. Symposium C – Silicon Front-End Junction Formation-Physics and Technology, 2004, indéterminée, Unknown Region. pp.21-27, ⟨10.1557/PROC-810-C1.4⟩. ⟨hal-01736099⟩