A comprehensive study of the impact of dislocation loops on leakage currents in Si shallow junction devices
Résumé
In this work, the electrical properties of dislo
cation loops and their role in the generation of
leakage currents in p-n or Schottky junctions were
investigated both experimentally and through
simulations. Deep Level Transient Spectroscopy
(DLTS) reveals that the implantation of silicon
with 2
10
15
Ge cm
2
and annealing between 1000
C and 1100
C introduced two broad elec-
tron levels E
C
0.38 eV and E
C
0.29 eV in n-type samples and a single broad hole trap E
V
þ
0.25 eV in the p-type samples. These trap levels are related to the extended defects (dislocation
loops) formed during annealing. Dislocation loo
ps are responsible for the significant increase of
leakage currents which are attributed to the sam
e energy levels. The comparison between struc-
tural defect parameters and electrical defect con
centrations indicates that atoms located on the
loop perimeter are the likely sources of the measured DLTS signals. The combined use of defect
models and recently developed DLTS simulation allows reducing the number of assumptions and
fitting parameters needed for the simulation of l
eakage currents, therefore improving their pre-
dictability. It is found that simulations based on t
he coupled-defect-levels model reproduce well
the measured leakage current values and their field dependence behaviour, indicating that leakage
currents can be successfully simulated on the exc
lusive basis of the experimentally observed
energy levels
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